Intel Reveals Details of Arapahoe/3GIO After SIG Approval
The "Arapahoe" 3GIO standard has been approved by the PCI Special Interest Group, paving the way for it to replace the current PCI bus. The PCI SIG's board of directors approved the new standard on Friday morning, although the standard will need to be formally finalized, then ratified in a later session by the membership at large. In interviews, executives at Intel Corp. detailed their plans for Arapahoe, seen as a universal replacement for PCI in desktops, mobile PCs, servers, and other devices.
As suspected, Arapahoe will be a serial point-to-point interconnect, capable of scaling from 1- to 32-bits wide. The total bandwidth per pin is initially targeted at 2.5 Gbits/s per pin which could then be clocked higher in future updates, according to Bala Cadambi, program manager of third-generation interconnect technology at Intel, Santa Clara, Calif.
Intel executives said they're conceptually positioning the technology as offering twelve times the bandwidth of PCI-X, currently in deployment in workstations and servers. PCI-X uses a parallel bus that can run as fast as 133-MHz over a 64-bit wide connection, to about 1 Gbyte/s.
The 3GIO moniker refers to the "third generation" of I/O, with ISA and the current PCI specification representing the first two generations. Arapahoe will co-exist and complement other I/O attach technologies such as InfiniBand, IEEE 1394b, USB 2.0, serial ATA and 10/100-Gbit Ethernet, officials promised.
The Arapahoe standard, though approved by the PCI Special Interest Group, is being driven by the Arapahoe Working Group, a group that's separate from the PCI SIG, according to Roger Tipley, president of the PCI SIG and an executive at Compaq Computer Corp. The working group includes Compaq Computer Corp., Dell Computer Corp., IBM Corp., Intel Corp., and Microsoft Corp.
The PCI SIG's vote followed a week's delay week to allow the nine directors on its board--which include representatives from Compaq, IBM, Intel and Microsoft--time to review the proposal.
The tentative timeline for the first Arapahoe products to be produced is during the second half of 2003, according to Michelle Leyden Li, platform initiatives manager of the desktop platforms product group at Intel. The initial specification will serve as a foundation for different flavors of Arapahoe, including optimized versions designed for desktop PCs, mobile PCs, servers and workstations, and communications, said Matthew Theall, director of the Third Generation I/O Program for Intel Communications.
One analyst though that Arapahoe products would arrive much sooner. "I guess? that what this tells me is that they didn't take a product in development and then extract the spec, which is what happened with HyperTransport," said Dean McCarron, analyst at Mercury Research Corp., Scottsdale, Ariz.
"It's clear that they learned something from Rambus," McCarron added. "With these sorts of high-speed buses, they want to make (the standard) as open as possible."
Intel officials confirmed that the implementation will likely include a hub architecture similar in concept to that used by the Universal Serial Bus, which could be altered to include fan-out PHY options such as those used by the IEEE 1394b specification. PCI SIG members have also publicly discussed something called "Serial PCI", without confirming that it and Arapahoe are one and the same.
On a per-pin basis, the bandwidth of Arapahoe will be higher than that offered by the HyperTransport specification, originally authored by Advanced Micro Devices Inc., Sunnyvale, California. HyperTransport uses a pair of pins to transfer information back and forth at 1.6 Gbits/s per pin-pair using an 800-MHz clock.
However, the Arapahoe authors believe that the spec will be a pure replacement to PCI, and not directly competitive with HyperTransport, a statement analysts have generally supported.
That position was also backed up by said Gabriele Sartori, director of strategic marketing for the Computational Products Group at AMD. "I see the same thing," he said. "This isn't going to be the bus war that some people have written about."
A "draft 1.0" specification of the Arapahoe standard will be circulated to the member companies of the working group and an undefined number of "promoter companies" at Intel's Developer Forum beginning August 27, Leyden Li said. The specification will later be submitted to the SIG for final approval, which could take six months or so.
"The goal is to work with each of the companies, to keep this an open specification," Leyden Li said.
"At Unisys, we are studying the competing specifications as they become available and are refined," said Dave Houseman, chief technologist at Unisys Corp., Blue Bell, Penn., in an emailed comment to ExtremeTech. last week.
"We have not committed to any at this time because they are all in their infancy," Houseman wrote. "We may choose to adopt one or more of the technologies for use in various components of our large server systems depending on how well they fit with our needs. We fully intend to monitor the developments in this area so that we can make the appropriate choices as the technologies mature."
"PCI lives on in 'Arapahoe'," said Tipley, in an associated statement. "While today's PCI will fulfill the needs of local I/O devices for many years to come, a broad range of applications will see the benefits of choosing the Arapahoe interface. Arapahoe's scalability expands the list of hardware solutions that will gravitate to PCI-SIG technologies, and PCI-SIG adoption will help establish Arapahoe as a highly successful industry standard I/O interface."
