Intel demos real-time code compression for die shrinkage, power saving
Intel researchers have developed a way to make the increasingly tiny processors needed to power the impending "Internet of Things" even tinier: compress the code running on them.
"We compress the code, make it smaller, and save area and power of integrated on-die memory," Intel Labs senior reseacher Sergey Kochuguev from ZAO Intel A/O in St. Petersburg, Russia, told The Reg at Tuesday's Research@Intel shindig in San Francisco.
The FPGA research die that Kochuguev demoed used a dedicated hardware compression-decompression unit of a mere 20,000 gates that sits on the die between the compute core and on-die memory. The process happens dynamically in real time, and is transparent to the core. You might reasonably ask what level of latency would be introduced in such a scheme, but Kochuguev told us that it was low enough to make the power and die-size benefits worthwhile: less than 5 per cent as measured by industry-standard EEMBC benchmarks.
