DRAM Part II: asynchronous and synchronous DRAM

Arstechnica is back with another tech-fu article on RAM, this time on Asynchronous and
Synchronous DRAM. Hannibal gets busy explaining the technical differences and
performance implications of the two popular styles of RAM, and puts their development in
the context of the evolving PC platform (e.g., the 133MHz FSB, etc.). He explains the
significance behind CAS ratings, RAS precharge times, and more.

For our purposes, there are two main types of delays that we have to
take into account. The first type includes the delays that have to take
place between successive DRAM reads. You can't just fire off a read and
then fire off another one immediately afterwards. Since a DRAM read
involves charging and recharging capacitors, and various control signals
have to propagate hither and thither so that the chip'll know what it's
doing, you have to stick some space in between reads so that all the
signals can settle back down and the capacitors can recharge.
This article is full to the brim with the technical info you need to dazzle the
honeys and make all dem monies.